Hypertherm D845GEBV2 Manuel d'utilisateur télécharger pdf (Page 58)

Intel Desktop Board D845GEBV2/D845GERG2 Technical Product Specification

Table 24. PCI Interrupt Routing Map

ICH4 PIRQ Signal Name

PCI Interrupt Source

PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH

AGP connector INTA INTB

ICH4 USB UHCI controller 1 INTA

SMBus controller INTB

ICH4 USB UHCI controller 2 INTB

AC ’97 ICH4 Audio/Modem INTB

ICH4 LAN INTA

ICH4 USB UHCI controller 3 INTC

ICH4 USB 2.0 EHCI controller

INTD

PCI bus connector 1 INTD INTA INTB INTC

PCI bus connector 2 INTC INTB INTA INTD

PCI bus connector 3 INTD INTC INTA INTB

PCI bus connector 4

(Note)

INTB INTA INTC INTD

PCI bus connector 5

(Note)

INTC INTA INTD INTB

PCI bus connector 6

(Note)

INTA INTB INTD INTC

Note: Desktop Board D845GEBV2 only

✏

NOTE

In PIC mode, the ICH4 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,

7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a

unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or

more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 23 for the

allocation of PIRQ lines to IRQ signals in APIC mode.

1 2 ... 53 54 55 56 57 58 59 60 61 62 63 ... 127 128

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Hypertherm D845GEBV2 Manuel d'utilisateur Page 58